Software Vault: The Gold Collection/Software Vault - The Gold Collection (American Databankers) (1993).ISO/cdr45/gravis.zip/TECH7.TXT

Text File | 1993-01-22 | 4KB | 75 lines

TITLE:      Advanced Gravis Tech Note #7
AREA:       16 BIT DMA
DATE:       January 20, 1993
KEY WORDS:  OPTI CHIPSET 16 BIT DMA CRASH

SUBJECT: Faulty DMA controllers

There is a known problem accessing 16 bit DMA channels on certain brands
of chipsets, including SOME models of OPTI.

The way to tell if you have this problem is by setting the GUS DMA channel
to one of the 16 bit DMAs, 5, 6 or 7.  Try playing some digital audio
samples.  You may have to run them 5-10 times to make sure there are
no problems.  If you get a PARITY error set the DMA channel to an 8
bit DMA such as 1 or 3.  Play some more digital audio samples.  If you do
not get another parity error then you probably have a faulty DMA controller.

The are a few ways to fix this problem.  First, you can replace your
motherboard.  Remember a motherboard without CPU should only be a few
hundred dollars.  It is the CPU that cost so much, not the motherboard.
If this is not an alternative and you can not live with an 8 bit DMA channel,
you may try running the program OPTIFIX that may be found in GUS0013.ZIP
on the Gravis BBS [phone].

What follows is a detailed description of the problem.

In the past 4 months or so, we have seen a rash of systems with 386 and 486
motherboards that crash whenever audio playback is attempted through any
audio card that uses DMA.  We have traced the problem to the 82C206 chip
on the motherboard, most often (but not always) manufactured by OPTi.
This is the device that houses the interrupt and DMA controllers, the
counter/timers, and the real time clock.  Note that this isn't a global
problem with these devices; there remains a larger number of systems
operating perfectly that use the 82C206.  This may be related to a
particlar lot of the 82C206, but we don't have enough information to know
how widespread it may be.

Technically, the problem results from the /DMAMEMR pin of the 82C206 (pin 61,
which is active low).  This pin drives the MEMORY READ line on the
motherboard during DMA transfers from memory to I/O, which is the transfer
mode used during audio playback.  This pin goes to a tri-state condition
after the DMA cycle.  Apparently, on systems that exhibit this problem,
the line remains at an active level too long when switching to the tri-state
condition, which can cause a memory parity error to occur.

In theory, the simplest solution to the problem is to add a resistor to the
motherboard to pull pin 61 hard to the off state (a resistor between 1K
and 2K placed from pin 61 to +5V).  We have verified that this solves
the problem, but it is far from practical in most situations.  This is
not a recommended and Gravis will not be responsible for any damages.  Try
it at your own risk.

There is one other solution that we have found to solve the problem.  We
have discovered that re-configuring the DMA controller to temporarily disable
the cascade channel during playback seems to eliminate the problem.  It must
be noted that disabling cascade mode will also disable anything that uses DMA
channels 0 through 3, which will usually include the floppy drives.  In
most cases, this shouldn't be a problem, since audio playback from a floppy
drive isn't practical.  It would, however, be a problem if there are
background tasks that involve floppy access during playback.

In order to implement this fix, the following needs to be done:
To disable cascade mode (prior to playback), send data 0 to address D6(hex).

   outportb(0xD6,0);

To re-enable cascade mode (after playback), send data C0(hex) to address
D6(hex).  Using the toolkit definitions, this is:

   outportb(0xD6,0xC0);

You will find a program on the Gravis BBS [phone] called OPTIFIX
in the file GUS0013.ZIP which does do this.